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? semiconductor components industries, llc, 2006 december, 2006 ? rev. 10 1 publication order number: mc10lvep16/d mc10lvep16, mc100lvep16 2.5v / 3.3vecl differential receiver/driver description the mc10/100lvep16 is a world class differential receiver/driver. the device is functionally equivalent to the el16, ep16 and lvel16 devices. with output transition times significantly faster than the el16 and lvel16, the lvep16 is ideally suited for interfacing with high frequency and low voltage (2.5 v) sources. single ? ended clk input operation is limited to a v cc 3.0 v in pecl mode, or v ee ? 3.0 v in necl mode. the v bb pin, an internally generated voltage supply, is available to this device only. for single ? ended input conditions, the unused differential input is connected to v bb as a switching reference voltage. v bb may also rebias ac coupled inputs. when used, decouple v bb and v cc via a 0.01 f capacitor and limit current sourcing or sinking to 0.5 ma. when not used, v bb should be left open. the 100 series contains temperature compensation. features ? 240 ps propagation delay ? maximum frequency > 4 ghz typical ? pecl mode operating range: v cc = 2.375 v to 3.8 v with v ee = 0 v ? necl mode operating range: v cc = 0 v with v ee = ? 2.375 v to ? 3.8 v ? v bb output ? open input default state ? lvds input compatible ? pb ? free packages are available *for additional marking information, refer to application note and8002/d. h = mc10 a = assembly location k = mc100 l = wafer lot 5y = mc10 y = year 4l = mc100 w = work week m = date code = pb ? free package (note: microdot may be in either location) marking diagrams* hu16 alyw ku16 alyw soic ? 8 d suffix case 751 tssop ? 8 dt suffix case 948r 1 8 1 8 1 8 http://onsemi.com see detailed ordering and shipping information in the package dimensions section on page 8 of this data sheet. ordering information 1 8 hvp16 alyw 1 8 kvp16 alyw 1 8 dfn8 mn suffix case 506aa 5y m 14 4l m 14
mc10lvep16, mc100lvep16 http://onsemi.com 2 1 2 3 45 6 7 8 q v ee v cc d q d v bb nc figure 1. 8 ? lead pinout (top view) and logic diagram table 1. pin description pin function d*, d ** ecl data inputs q, q ecl data outputs v bb ref. voltage output v cc positive supply v ee negative supply nc no connect ep exposed pad must be connected to a sufficient thermal conduit. electrically connect to the most negative supply or leave floating open. * pins will default low when left open. **pins will default to v cc /2 when left open. table 2. attributes characteristics value internal input pulldown resistor 75 k internal input pullup resistor 37.5 k esd protection human body model machine model charged device model > 4 kv > 200 v > 2 kv moisture sensitivity, indefinite time out of drypack (note 1) level 1 flammability rating oxygen index: 28 to 34 ul 94 v ? 0 @ 0.125 in transistor count 167 devices meets or exceeds jedec spec eia/jesd78 ic latchup test 1. for additional information, see application note and8003/d.
mc10lvep16, mc100lvep16 http://onsemi.com 3 table 3. maximum ratings symbol parameter condition 1 condition 2 rating unit v cc pecl mode power supply v ee = 0 v 6 v v ee necl mode power supply v cc = 0 v ? 6 v v i pecl mode input voltage necl mode input voltage v ee = 0 v v cc = 0 v v i v cc v i v ee 6 ? 6 v v i out output current continuous surge 50 100 ma ma i bb v bb sink/source 0.5 ma t a operating temperature range ? 40 to +85 c t stg storage temperature range ? 65 to +150 c ja thermal resistance (junction ? to ? ambient) 0 lfpm 500 lfpm soic ? 8 soic ? 8 190 130 c/w c/w jc thermal resistance (junction ? to ? case) standard board soic ? 8 41 to 44 c/w ja thermal resistance (junction ? to ? ambient) 0 lfpm 500 lfpm tssop ? 8 tssop ? 8 185 140 c/w c/w jc thermal resistance (junction ? to ? case) standard board tssop ? 8 41 to 44 c/w ja thermal resistance (junction ? to ? ambient) 0 lfpm 500 lfpm dfn8 dfn8 129 84 c/w c/w t sol wave solder pb pb ? free <2 to 3 sec @ 248 c <2 to 3 sec @ 260 c 265 265 c stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above t he recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may af fect device reliability.
mc10lvep16, mc100lvep16 http://onsemi.com 4 table 4. 10ep dc characteristics, pecl v cc = 2.5 v, v ee = 0 v (note 2) ? 40 c 25 c 85 c symbol characteristic min typ max min typ max min typ max unit i ee power supply current 17 22 27 17 22 27 17 22 28 ma v oh output high voltage (note 3) 1365 1490 1615 1430 1555 1680 1490 1615 1740 mv v ol output low voltage (note 3) 565 740 865 630 805 930 690 865 990 mv v ihcmr input high voltage common mode range (differential configuration) (notes 4, 5) 1.2 2.5 1.2 2.5 1.2 2.5 v i ih input high current 150 150 150 a i il input low current d d 0.5 ? 150 0.5 ? 150 0.5 ? 150 a note: device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printe d circuit board with maintained transverse airflow greater than 500 lfpm. electrical parameters are guaranteed only over the declared operating temperature range. functional operation of the device exceeding these conditions is not implied. device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 2. input and output parameters vary 1:1 with v cc . v ee can vary +0.125 v to ? 1.3 v. 3. all loading with 50 to v cc ? 2.0 v. 4. do not use v bb at v cc < 3.0 v. single ended input clk pin operation is limited to v cc 3.0 v in pecl mode. 5. v ihcmr min varies 1:1 with v ee , v ihcmr max varies 1:1 with v cc . the v ihcmr range is referenced to the most positive side of the dif ferential input signal. table 5. 10ep dc characteristics, pecl v cc = 3.3 v, v ee = 0 v (note 6) ? 40 c 25 c 85 c symbol characteristic min typ max min typ max min typ max unit i ee power supply current 17 22 27 17 22 27 17 22 28 ma v oh output high voltage (note 7) 2165 2290 2415 2230 2355 2480 2290 2415 2540 mv v ol output low voltage (note 7) 1365 1540 1665 1430 1605 1730 1490 1665 1790 mv v ih input high voltage (single ended) 2090 2415 2155 2480 2215 2540 mv v il input low voltage (single ended) 1365 1690 1430 1755 1490 1815 mv v bb output voltage reference (note 8) 1790 1890 1990 1855 1955 2055 1915 2015 2115 mv v ihcmr input high voltage common mode range (differential configuration) (note 9) 1.2 3.3 1.2 3.3 1.2 3.3 v i ih input high current 150 150 150 a i il input low current d d 0.5 ? 150 0.5 ? 150 0.5 ? 150 a note: device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printe d circuit board with maintained transverse airflow greater than 500 lfpm. electrical parameters are guaranteed only over the declared operating temperature range. functional operation of the device exceeding these conditions is not implied. device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 6. input and output parameters vary 1:1 with v cc . v ee can vary +0.925 v to ? 0.5 v. 7. all loading with 50 to v cc ? 2.0 v. 8. single ended input clk pin operation is limited to v cc 3.0 v in pecl mode. 9. v ihcmr min varies 1:1 with v ee , v ihcmr max varies 1:1 with v cc . the v ihcmr range is referenced to the most positive side of the dif ferential input signal.
mc10lvep16, mc100lvep16 http://onsemi.com 5 table 6. 10ep dc characteristics, necl v cc = 0 v, v ee = ? 3.8 v to ? 2.375 v (note 10) ? 40 c 25 c 85 c symbol characteristic min typ max min typ max min typ max unit i ee power supply current 17 22 27 17 22 27 17 22 28 ma voh output high voltage (note 11) ? 1135 ? 1010 ? 885 ? 1070 ? 945 ? 820 ? 1010 ? 885 ? 760 mv v ol output low voltage (note 11) ? 1935 ? 1760 ? 1635 ? 1870 ? 1695 ? 1570 ? 1810 ? 1635 ? 1510 mv v ih input high voltage (single ended) ? 1210 ? 885 ? 1145 ? 820 ? 1085 ? 760 mv v il input low voltage (single ended) ? 1935 ? 1610 ? 1870 ? 1545 ? 1810 ? 1485 mv v bb output voltage reference (note 12) ? 1510 ? 1410 ? 1310 ? 1445 ? 1345 ? 1245 ? 1385 ? 1285 ? 1185 mv v ihcmr input high voltage common mode range (differential configuration) (note 13) v ee +1.2 0.0 v ee +1.2 0.0 v ee +1.2 0.0 v i ih input high current 150 150 150 a i il input low current d d 0.5 ? 150 0.5 ? 150 0.5 ? 150 a note: device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printe d circuit board with maintained transverse airflow greater than 500 lfpm. electrical parameters are guaranteed only over the declared operating temperature range. functional operation of the device exceeding these conditions is not implied. device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 10. input and output parameters vary 1:1 with v cc . 11. all loading with 50 to v cc ? 2.0 v. 12. single ended input clk pin operation is limited to v ee ? 3.0 v in necl mode. 13. v ihcmr min varies 1:1 with v ee , v ihcmr max varies 1:1 with v cc . the v ihcmr range is referenced to the most positive side of the dif ferential input signal. table 7. 100ep dc characteristics, pecl v cc = 2.5 v, v ee = 0 v (note 14) ? 40 c 25 c 85 c symbol characteristic min typ max min typ max min typ max unit i ee power supply current 19 24 29 22 28 34 24 30 36 ma v oh output high voltage (note 15) 1355 1480 1605 1355 1480 1605 1355 1480 1605 mv v ol output low voltage (note 15) 555 730 900 555 730 900 555 730 900 mv v ihcmr input high voltage common mode range (differential configuration) (notes 16, 17) 1.2 3.3 1.2 3.3 1.2 3.3 v i ih input high current 150 150 150 a i il input low current d d 0.5 ? 150 0.5 ? 150 0.5 ? 150 a note: device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printe d circuit board with maintained transverse airflow greater than 500 lfpm. electrical parameters are guaranteed only over the declared operating temperature range. functional operation of the device exceeding these conditions is not implied. device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 14. input and output parameters vary 1:1 with v cc . v ee can vary +0.125 v to ? 1.3 v. 15. all loading with 50 to v cc ? 2.0 v. 16. do not use v bb at v cc < 3.0 v. single ended input clk pin operation is limited to v cc 3.0 v in pecl mode. 17. v ihcmr min varies 1:1 with v ee , v ihcmr max varies 1:1 with v cc . the v ihcmr range is referenced to the most positive side of the dif ferential input signal.
mc10lvep16, mc100lvep16 http://onsemi.com 6 table 8. 100ep dc characteristics, pecl v cc = 3.3 v, v ee = 0 v (note 18) ? 40 c 25 c 85 c symbol characteristic min typ max min typ max min typ max unit i ee power supply current 19 24 29 22 28 34 24 30 36 ma v oh output high voltage (note 19) 2155 2280 2405 2155 2280 2405 2155 2280 2405 mv v ol output low voltage (note 19) 1355 1530 1700 1355 1530 1700 1355 1530 1700 mv v ih input high voltage (single ended) 2135 2420 2135 2420 2135 2420 mv v il input low voltage (single ended) 1355 1700 1355 1700 1355 1700 mv v bb output voltage reference (note 20) 1775 1875 1975 1775 1875 1975 1775 1875 1975 mv v ihcmr input high voltage common mode range (differential configuration) (note 21) 1.2 3.3 1.2 3.3 1.2 3.3 v i ih input high current 150 150 150 a i il input low current d d 0.5 ? 150 0.5 ? 150 0.5 ? 150 a note: device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printe d circuit board with maintained transverse airflow greater than 500 lfpm. electrical parameters are guaranteed only over the declared operating temperature range. functional operation of the device exceeding these conditions is not implied. device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 18. input and output parameters vary 1:1 with v cc . v ee can vary +0.925 v to ? 0.5 v. 19. all loading with 50 to v cc ? 2.0 v. 20. single ended input clk pin operation is limited to v cc 3.0 v in pecl mode. 21. v ihcmr min varies 1:1 with v ee , v ihcmr max varies 1:1 with v cc . the v ihcmr range is referenced to the most positive side of the dif ferential input signal. table 9. 100ep dc characteristics, necl v cc = 0 v, v ee = ? 3.8 v to ? 2.375 v (note 22) ? 40 c 25 c 85 c symbol characteristic min typ max min typ max min typ max unit i ee power supply current 19 24 29 22 28 34 24 30 36 ma v oh output high voltage (note 23) ? 1145 ? 1020 ? 895 ? 1145 ? 1020 ? 895 ? 1145 ? 1020 ? 895 mv v ol output low voltage (note 23) ? 1945 ? 1770 ? 1600 ? 1945 ? 1770 ? 1600 ? 1945 ? 1770 ? 1600 mv v ih input high voltage (single ended) ? 1165 ? 880 ? 1165 ? 880 ? 1165 ? 880 mv v il input low voltage (single ended) ? 1945 ? 1600 ? 1945 ? 1600 ? 1945 ? 1600 mv v bb output voltage reference (note 24) ? 1525 ? 1425 ? 1325 ? 1525 ? 1425 ? 1325 ? 1525 ? 1425 ? 1325 mv v ihcmr input high voltage common mode range (differential configuration) (note 25) v ee +1.2 0.0 v ee +1.2 0.0 v ee +1.2 0.0 v i ih input high current 150 150 150 a i il input low current d d 0.5 ? 150 0.5 ? 150 0.5 ? 150 a note: device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printe d circuit board with maintained transverse airflow greater than 500 lfpm. electrical parameters are guaranteed only over the declared operating temperature range. functional operation of the device exceeding these conditions is not implied. device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 22. input and output parameters vary 1:1 with v cc . 23. all loading with 50 to v cc ? 2.0 v. 24. single ended input clk pin operation is limited to v ee ? 3.0 v in necl mode. 25. v ihcmr min varies 1:1 with v ee , v ihcmr max varies 1:1 with v cc . the v ihcmr range is referenced to the most positive side of the dif ferential input signal.
mc10lvep16, mc100lvep16 http://onsemi.com 7 table 10. ac characteristics v cc = 0 v; v ee = ? 3.8 v to ? 2.375 v or v cc = 2.375 v to 3.8 v; v ee = 0 v (note 26) symbol characteristic ? 40 c 25 c 85 c unit min typ max min typ max min typ max f max maximum frequency (see figure 2. f max /jitter) > 4 > 4 > 4 ghz t plh , t phl propagation delay to output differential 150 220 300 170 240 320 190 260 330 ps t skew duty cycle skew (note 27) 5.0 20 5.0 20 5.0 20 ps t jitter clock random jitter (rms) @ 1.0 ghz @ 1.5 ghz @ 2.0 ghz @ 2.5 ghz @ 3.0 ghz @ 3.5 ghz 0.134 0.077 0.115 0.117 0.122 0.123 0.2 0.2 0.2 0.2 0.2 0.2 0.147 0.104 0.141 0.132 0.143 0.145 0.3 0.3 0.3 0.3 0.3 0.3 0.166 0.145 0.153 0.156 0.177 0.202 0.3 0.3 0.3 0.3 0.3 0.3 ps v pp input voltage swing (differential configuration) 150 800 1200 150 800 1200 150 800 1200 mv t r t f output rise/fall times q, q (20% ? 80%) 70 120 170 80 130 180 100 150 200 ps note: device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printe d circuit board with maintained transverse airflow greater than 500 lfpm. electrical parameters are guaranteed only over the declared operating temperature range. functional operation of the device exceeding these conditions is not implied. device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 26. measured using a 750 mv source, 50% duty cycle clock source. all loading with 50 to v cc ? 2.0 v. 27. skew is measured between outputs under identical transitions. duty cycle skew is defined only for differential operation whe n the delays are measured from the cross point of the inputs to the cross point of the outputs. 0 100 200 300 400 500 600 700 800 900 0 1000 2000 3000 4000 5000 6000 frequency (mhz) 1 2 3 4 5 6 7 8 (jitter) figure 2. f max /jitter 9 v outpp (mv) jitter out ps (rms)
mc10lvep16, mc100lvep16 http://onsemi.com 8 figure 3. typical termination for output driver and device evaluation (see application note and8020/d ? termination of ecl logic devices.) driver device receiver device qd q d z o = 50 z o = 50 50 50 v tt v tt = v cc ? 2.0 v ordering information device package shipping ? mc10lvep16d soic ? 8 98 units / rail MC10LVEP16DG soic ? 8 (pb ? free) 98 units / rail mc10lvep16dr2 soic ? 8 2500 / tape & reel mc10lvep16dr2g soic ? 8 (pb ? free) 2500 / tape & reel mc10lvep16dt tssop ? 8 100 units / rail mc10lvep16dtg tssop ? 8 (pb ? free) 100 units / rail mc10lvep16dtr2 tssop ? 8 2500 / tape & reel mc10lvep16dtr2g tssop ? 8 (pb ? free) 2500 / tape & reel mc10lvep16mnr4 dfn8 1000 / tape & reel mc10lvep16mnr4g dfn8 (pb ? free) 1000 / tape & reel mc100lvep16d soic ? 8 98 units / rail mc100lvep16dg soic ? 8 (pb ? free) 98 units / rail mc100lvep16dr2 soic ? 8 2500 / tape & reel mc100lvep16dr2g soic ? 8 (pb ? free) 2500 / tape & reel mc100lvep16dt tssop ? 8 100 units / rail mc100lvep16dtg tssop ? 8 (pb ? free) 100 units / rail mc100lvep16dtr2 tssop ? 8 2500 / tape & reel mc100lvep16dtr2g tssop ? 8 (pb ? free) 2500 / tape & reel mc100lvep16mnr4 dfn8 1000 / tape & reel mc100lvep16mnr4g dfn8 (pb ? free) 1000 / tape & reel ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d.
mc10lvep16, mc100lvep16 http://onsemi.com 9 resource reference of application notes an1405/d ? ecl clock distribution techniques an1406/d ? designing with pecl (ecl at +5.0 v) an1503/d ? eclinps i/o spice modeling kit an1504/d ? metastability and the eclinps family an1568/d ? interfacing between lvds and ecl an1672/d ? the ecl translator guide and8001/d ? odd number counters design and8002/d ? marking and date codes and8020/d ? termination of ecl logic devices and8066/d ? interfacing with eclinps and8090/d ? ac characteristics of ecl devices
mc10lvep16, mc100lvep16 http://onsemi.com 10 package dimensions soic ? 8 nb case 751 ? 07 issue ah seating plane 1 4 5 8 n j x 45 k notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimension a and b do not include mold protrusion. 4. maximum mold protrusion 0.15 (0.006) per side. 5. dimension d does not include dambar protrusion. allowable dambar protrusion shall be 0.127 (0.005) total in excess of the d dimension at maximum material condition. 6. 751 ? 01 thru 751 ? 06 are obsolete. new standard is 751 ? 07. a b s d h c 0.10 (0.004) dim a min max min max inches 4.80 5.00 0.189 0.197 millimeters b 3.80 4.00 0.150 0.157 c 1.35 1.75 0.053 0.069 d 0.33 0.51 0.013 0.020 g 1.27 bsc 0.050 bsc h 0.10 0.25 0.004 0.010 j 0.19 0.25 0.007 0.010 k 0.40 1.27 0.016 0.050 m 0 8 0 8 n 0.25 0.50 0.010 0.020 s 5.80 6.20 0.228 0.244 ? x ? ? y ? g m y m 0.25 (0.010) ? z ? y m 0.25 (0.010) z s x s m 1.52 0.060 7.0 0.275 0.6 0.024 1.270 0.050 4.0 0.155 mm inches scale 6:1 *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint*
mc10lvep16, mc100lvep16 http://onsemi.com 11 package dimensions dim min max min max inches millimeters a 2.90 3.10 0.114 0.122 b 2.90 3.10 0.114 0.122 c 0.80 1.10 0.031 0.043 d 0.05 0.15 0.002 0.006 f 0.40 0.70 0.016 0.028 g 0.65 bsc 0.026 bsc l 4.90 bsc 0.193 bsc m 0 6 0 6 seating plane pin 1 1 4 85 detail e b c d a g detail e f m l 2x l/2 ? u ? s u 0.15 (0.006) t s u 0.15 (0.006) t s u m 0.10 (0.004) v s t 0.10 (0.004) ? t ? ? v ? ? w ? 0.25 (0.010) 8x ref k ident k 0.25 0.40 0.010 0.016 tssop ? 8 dt suffix plastic tssop package case 948r ? 02 issue a notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimension a does not include mold flash. protrusions or gate burrs. mold flash or gate burrs shall not exceed 0.15 (0.006) per side. 4. dimension b does not include interlead flash or protrusion. interlead flash or protrusion shall not exceed 0.25 (0.010) per side. 5. terminal numbers are shown for reference only. 6. dimension a and b are to be determined at datum plane ?w?.
mc10lvep16, mc100lvep16 http://onsemi.com 12 package dimensions dfn8 case 506aa ? 01 issue d notes: 1. dimensioning and tolerancing per asme y14.5m, 1994 . 2. controlling dimension: millimeters. 3. dimension b applies to plated terminal and is measured between 0.25 and 0.30 mm from terminal. 4. coplanarity applies to the exposed pad as well as the terminals. ???? ???? ???? ???? a d e b c 0.10 pin one 2 x reference 2 x top view side view bottom view a l (a3) d2 e2 c c 0.10 c 0.10 c 0.08 8 x a1 seating plane e/2 e 8 x k note 3 b 8 x 0.10 c 0.05 c a b b dim min max millimeters a 0.80 1.00 a1 0.00 0.05 a3 0.20 ref b 0.20 0.30 d 2.00 bsc d2 1.10 1.30 e 2.00 bsc e2 0.70 0.90 e 0.50 bsc k 0.20 ??? l 0.25 0.35 1 4 8 5 on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its of ficers, employees, subsidiaries, af filiates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5773 ? 3850 mc10lvep16/d eclinps is a trademark of semiconductor components industries, llc (scillc). literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative

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